Accurately modeling speculative instruction fetching in trace-driven simulation

Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challenges. A popular evaluation methodology is trace-driven simulation which provides the advantage of a highly portable simulator that is independent of the constraints of the trace generation system. While developing and maintaining a trace-driven simulator is relatively easier than other alternatives, a primary drawback is the inability to accurately simulate speculative instruction fetching and subsequent execution. Fetching from an incorrect path occurs often in a speculative processor, however it is di cult to capture this information in a trace. This paper investigates a scheme to accurately model instruction fetching within a trace-driven framework. This is accomplished by recreating an approximate copy of the object code segment, which we call resurrected code, using a preliminary pass through the trace. ...

• Type: Conference
• Year: 1999
• Where: IPCCC
• Authors: R. Bhargava, L. K. John, F. Matus
• Keywords: Communications, IPCCC 1999, Speculative Fetching, Trace Generation System, Trace-driven Simulation