Integer Programming Models for Optimization Problems in Test Generation

— Test Pattern Generation for combinational circuits entails the identification of primary input assignments for detecting each fault in a set of target faults. An extension to this procedure consists of reducing the number of required test patterns by using heuristic test compaction techniques. In this paper we show that finding the optimally compacted test set can be cast as an integer linear programming (ILP) optimization problem, thus providing a formal framework for characterizing this optimization problem as well as the heuristics commonly used in its solution. One significant property of the proposed ILP model is that its size is polynomial in the size of the original circuit description. Moreover, we describe techniques for reducing the size of the proposed ILP formulation. These techniques include, for example, identification of fault independence relations, removal of redundant faults by preprocessing, and using empirical upper bounds.

• Type: Conference
• Year: 1998
• Where: ASPDAC
• Authors: João P. Marques Silva
• Keywords: ASPDAC 1998, Hardware, Test Compaction Techniques, Test Pattern Generation, Test Patterns