An exact solution to simultaneous technology mapping and linear placement problem

In this paper, we present an optimal algorithm for solving the simultaneous technology mapping and linear placement problem for tree-structured circuits with the objective of minimizing the post-layout area. The proposed algorithm relies on generation of gate-area versus cut-width curves using a dynamic programming approach. A novel design flow, which extends this algorithm to minimize the circuit delay and handle general DAG structures, is also presented. Experimental results on MCNC benchmarks are reported.

• Type: Conference
• Year: 1997
• Where: ICCAD
• Authors: Jinan Lou, Amir H. Salek, Massoud Pedram
• Keywords: Algorithm Relies, Hardware, ICCAD 1997, Linear Placement Problem, Optimal Algorithm