Fully depleted CMOS/SOI device design guidelines for low power applications

In this paper we report the fully depleted CMOS/SOI device design guidelines for low power applications. Optimal technology, device and circuit parameters are discussed and compared with bulk CMOS based design. The differences and similarities are summarized. We believe this is the first such study to be reported.

• Type: Conference
• Year: 1997
• Where: ISLPED
• Authors: Srinivasa R. Banna, Philip C. H. Chan, Mansun Chan, Samuel K. H. Fung, Ping K. Ko
• Keywords: CMOS Based Design, Device Design Guidelines, Hardware, ISLPED 1997, Low Power Applications