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DATE
2010
IEEE

Detecting/preventing information leakage on the memory bus due to malicious hardware

13 years 7 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up these systems. Malicious circuitry can be inserted and hidden at several stages of the design process through the use of third-party Intellectual Property (IP), design tools, and manufacturing facilities. Such hardware Trojan circuitry has been shown to be capable of shutting down the main processor after a random number of cycles, broadcasting sensitive information over the bus, and bypassing software authentication mechanisms. In this work, we propose an architecture that can prevent information leakage due to such malicious hardware. Our technique is based on guaranteeing certain behavior in the memory system, which will be checked at an external guardian core that "approves" each memory request. By sitting between off-chip memory and the main core, the guardian core can monitor bus activity and ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok
Added 29 Sep 2010
Updated 29 Sep 2010
Type Conference
Year 2010
Where DATE
Authors Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok N. Choudhary
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