An Algorithm for Bi-Decomposition of Logic Functions

We propose a new BDD-based method for decomposition of multi-output incompletely specified logic functions into netlists of two-input logic gates. The algorithm uses the internal don't-cares during the decomposition to produce compact well-balanced netlists with short delay. The resulting netlists are provably nonredundant and facilitate test pattern generation. Experimental results over MCNC benchmarks show that our approach outperforms SIS and other BDD-based decomposition methods in terms of area and delay of the resulting circuits with comparable CPU time.

• Type: Conference
• Year: 2001
• Where: DAC
• Authors: Alan Mishchenko, Bernd Steinbach, Marek A. Perkowski
• Keywords: Approach Outperforms Sis, BDD-based Decomposition Methods, Compact Well-balanced Netlists, DAC 2001, Design Automation