Timing-based delay test for screening small delay defects

The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. These small delay defects might be activated on longer paths during functional operation and cause a timing failure. This paper presents an improved pattern generation technique for transition fault model, which provides a higher coverage of small delay defect that lie along the long paths, using a commercial no-timing ATPG tool. The proposed technique pre-processes the scan flip-flops based on their least slack path and the detectable delay defect size. A new delay defect size metric based on the affected path length and required increase in test frequency is developed. We then perform pattern generation and apply a novel pattern selection technique to screen test patterns affecting longer paths. Using this technique will provide the opportunity of using existing timing unaware ATPG tools as slack based ATPG...

• Type: Conference
• Year: 2006
• Where: DAC
• Authors: Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
• Keywords: DAC 2006, Delay Defect Size, Design Automation, Detectable Delay Defect, Small Delay Defect