Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring

The fine-grained parallelism inherent in FPGAs has encouraged their use in packet processing systems. Debugging and performance evaluation of such complex designs can be significantly improved through debug information that provides a system-level perspective and hides the complexity of signal-level debugging. In this paper we present a debugging system that permits transactionbased communication-centric monitoring of packet processing systems. We demonstrate, using two different examples, how this sysimprove the debugging information and abstract lower level detail. Furthermore, we demonstrate that transaction monitoring systems require fewer resources than conventional RTL debugging systems and can provide a system-level perspective not permitted by traditional tools. Categories and Subject Descriptors B.6.3 [LOGIC DESIGN]: Design Aids General Terms Design, Verification Keywords debug, FPGA, instrumentation, monitoring, transaction

• Type: Conference
• Year: 2009
• Where: LCTRTS
• Authors: Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
• Keywords: Debugging, LCTRTS 2009, Packet Processing Systems, Software Engineering, System-level Perspective