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2008
IEEE

Accelerated costas array enumeration using FPGAs

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Accelerated costas array enumeration using FPGAs
Abstract— Costas array enumeration is an NP-complete problem with a highly parallelize-able solution. This paper examines the implementation of a solution to this problem on an FPGA platform and examines the elements of what makes the most efficient solution to this problem. This paper compares the performance of the hardware solution against the performance of the best known software solution and finds an approximate 40 times speedup from using hardware.
Jim Devlin, Scott Rickard
Added 29 May 2010
Updated 29 May 2010
Type Conference
Year 2008
Where CISS
Authors Jim Devlin, Scott Rickard
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