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On Accommodating Particular Analog System Models with VHDL

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On Accommodating Particular Analog System Models with VHDL
In this paper the problem of accommodating particular analog system models, with emphasis on interconnection's representation, with discrete event simulators, and particularly with VHDL circuit descriptions, is discussed and a solution is proposed. The results can be successfully used for VHDL modeling and simulation, but they are implementation independent.
Gabriel Stefan Popescu
Added 30 Jul 2010
Updated 30 Jul 2010
Type Conference
Year 2000
Where BMAS
Authors Gabriel Stefan Popescu
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