Active ESD protection circuit design against charged-device-model ESD event in CMOS integrated circuits

CDM ESD event has become the main ESD reliability concern for integrated-circuits products using nanoscale CMOS technology. A novel CDM ESD protection design, using self-biased current trigger (SBCT) and source pumping, has been proposed and successfully verified in 0.13-lm CMOS technology to achieve 1-kV CDM ESD robustness. Ó 2007 Elsevier Ltd. All rights reserved.

• Type: Journal
• Year: 2007
• Where: MR
• Authors: Shih-Hung Chen, Ming-Dou Ker
• Keywords: CDM ESD, CDM ESD Event, CDM ESD Protection, MR 2007, Robotics