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DAC
1996
ACM

Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures

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Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made a strong impact on an application's ability to efficiently access memories. Unfortunately, successful compiler techniques which map high-level language data constructs to the addressing units of the architecture have lagged far behind. Since access to data is often the most demanding task in DSP, this mapping can be the most crucial function of the compiler. This paper introduces a new retargetable approach and prototype tool for the analysis of array references and traversals for efficient use of ACUs. The ArrSyn utility is designed to be used either as an enhancement to an existing dedicated compiler or as an aid for architecture exploration.
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra
Added 08 Aug 2010
Updated 08 Aug 2010
Type Conference
Year 1996
Where DAC
Authors Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerraya
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