Sciweavers

ASYNC
2000
IEEE

AMULET3i - An Asynchronous System-on-Chip

13 years 9 months ago
AMULET3i - An Asynchronous System-on-Chip
AMULET3i is the third generation asynchronous ARMcompatible microprocessor subsystem developed at the University of Manchester. It is internally modular, being based around the MARBLE asynchronous on-chip bus, and is also extensible through the addition of conventional clocked synthesizable peripherals via an on-chip synchronous peripheral bus. As such it is capable of forming the core of a wide range of system-on-chip applications, bringing asynchronous design into commercial use in a flexible and easy-to-use configuration. Its performance and area are comparable with clocked equivalents, and its low-power and electromagnetic emission characteristics give it unique capabilities in appropriate applications.
Jim D. Garside, W. J. Bainbridge, Andrew Bardsley,
Added 30 Jul 2010
Updated 30 Jul 2010
Type Conference
Year 2000
Where ASYNC
Authors Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, S. Mohammadi, J. S. Pepper, Steve Temple, J. V. Woods, Jianwei Liu, O. Petli
Comments (0)