Applications of clone circuits to issues in physical-design

In a companion paper of this session [1] we formally defined the notion of equivalence classes of circuits which are physical clones of an existing benchmark seed circuit created by the GEN tool. Here we use well-known partitioning and placement tools to study the behaviour of clone circuits. We outline a simple methodology for using equivalence classes of clone circuits for benchmarking. We then apply the methodology to the example of netlist partitioning by generating a large set of clones of a starting benchmark set in order to statistically distinguish two netlist partitioning algorithms. The primary purpose of this paper is to outline the acceptable and valid uses of clone circuits for benchmarking. In addition to specific examples we will also discuss practical experience with circuits produced by the current version of GEN, so that the user is aware of for what purposes GEN is currently useful, and for what purposes user aid or further research is required.

• Type: Conference
• Year: 1999
• Where: ISCAS
• Authors: Michael D. Hutton, Jonathan Rose
• Keywords: Clone Circuits, Equivalence Classes, Hardware, ISCAS 1999, Netlist Partitioning