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ENTCS
2006

The Case for Analog Circuit Verification

9 years 6 months ago
The Case for Analog Circuit Verification
The traditional approach to validate analog circuits is to utilize extensive SPICElevel simulations. The main challenge of this approach is knowing when all important corner cases have been simulated. A new alternative is to utilize formal verification techniques. This paper utilizes a simple example to illustrate the potential flaws of a simulation-only based validation methodology and the potential benefits of formal verification of analog circuits. Key words: Analog circuits, formal verification, hybrid Petri nets
Chris J. Myers, Reid R. Harrison, David Walter, Ni
Added 12 Dec 2010
Updated 12 Dec 2010
Type Journal
Year 2006
Where ENTCS
Authors Chris J. Myers, Reid R. Harrison, David Walter, Nicholas Seegmiller, Scott Little
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