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DAC
2004
ACM

Communication-efficient hardware acceleration for fast functional simulation

9 years 7 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more time-consuming as design complexity increases. To accelerate functional simulation, hardware acceleration is used to offload calculation-intensive tasks from the software simulator. Hardware accelerated simulation dramatically reduces the simulation time. However, the communication overhead between the software simulator and hardware accelerator is becoming a new critical bottleneck. We reduce the communication overhead by exploiting burst data transfer and parallelism, which are obtained by splitting testbench and moving a part of testbench into hardware accelerator. Our experiments demonstrated that the proposed method reduces the communication overhead by a factor of about 40 compared to conventional hardware accelerated simulation while maintaining the cycle accuracy and compatibility with the original testb...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2004
Where DAC
Authors Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong-Min Kyung
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