Sciweavers

Share
VLSID
2002
IEEE

Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study

10 years 7 months ago
Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study
Choosing the right methodology is a significant step towards successful VLSI designs. Traditional methodologies and tools are no longer adequate to handle large and complex designs. This paper presents a novel design methodology for complex deep-submicron designs, using a case study of the development of a high-end network processing ASIC chip-set. The paper focuses on the synergetic use of the "dual design verification approach", along with static verification methods in achieving defect free silicon. It also discusses the techniques employed for achieving faster and lessiterative timing closure.
Sanjeev Patel
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2002
Where VLSID
Authors Sanjeev Patel
Comments (0)
books