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2005
IEEE

DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs

10 years 3 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our scheme over previously published DVS schemes is its ability to provide hard QoS guarantees while still achieving considerable energy savings. Our scheme can handle workloads characterized by both, the datadependent variability in the execution time of multimedia tasks and the burstiness in the on-chip traffic arising out of multimedia processing. Many previous DVS algorithms capable of handling such workloads rely on control-theoretic feedback mechanisms or prediction schemes based on probabilistic techniques. Usually it is difficult to provide QoS guarantees with such schemes. In contrast, our scheme relies on worst-case interval-based characterization of the workload. The main novelty of our scheme is a combination of offline analysis and runtime monitoring to obtain worst case bounds on the workload and...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar
Added 24 Jun 2010
Updated 24 Jun 2010
Type Conference
Year 2005
Where CODES
Authors Alexander Maxiaguine, Samarjit Chakraborty, Lothar Thiele
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