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VTS
2003
IEEE

Efficient Implication - Based Untestable Bridge Fault Identifier

13 years 9 months ago
Efficient Implication - Based Untestable Bridge Fault Identifier
: This paper presents a novel, low cost technique based on implications to identify untestable bridging faults in sequential circuits. Sequential symbolic simulation [1] is first performed, as a preprocessing step, to identify nets which are uncontrollable to a specific logic value. Then, an implication-based analysis is carried out for each fault to determine if a particular fault is testable or not. We also use information about the untestable stuck-at faults to filter out some bridges early in the analysis process. The application of our technique to ISCAS ’89 sequential benchmark circuits and a few industrial circuits showed that a large number of untestable bridges could be identified at a low cost, both in terms of memory and execution time.
Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy,
Added 05 Jul 2010
Updated 05 Jul 2010
Type Conference
Year 2003
Where VTS
Authors Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, Sreejit Chakravarty
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