Efficient Switching Activity Simulation under a Real Delay Model Using a Bitparallel Approach

Estimating switching activity is a crucial step in optimizing circuits for low power. In this paper, a fast gate level switching activity estimator for combinational circuits will be presented. The combination of event driven and bitparallel simulation allows for high accuracy due to the real delay model of the former while maintaining the speedup of the latter. This is demonstrated by detailed experimental results.

• Type: Conference
• Year: 1999
• Where: DATE
• Authors: Markus Bühler, Matthias Papesch, K. Kapp, Utz G. Baitinger
• Keywords: Combinational Circuits, DATE 1999, Hardware, Level Switching Activity, Switching Activity