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10

INTEGRATION
2016

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An exact algorithm for wirelength optimal placements in VLSI design

8 years 1 months ago

An exact algorithm for wirelength optimal placements in VLSI design

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We present a new algorithm designed to solve ﬂoorplanning problems optimally. More precisely, the algorithm ﬁnds solutions to rectangle packing problems which globally minimize wirelength and avoid given sets of blocked regions. We present the ﬁrst optimal ﬂoorplans for 3 of the 5 intensely studied MCNC block packing instances and a signiﬁcantly larger industrial instance with 27 rectangles and thousands of nets. Moreover, we show how to use the algorithm to place larger instances that cannot be solved optimally in reasonable runtime.

Julia Funke, Stefan Hougardy, Jan Schneider

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Added	05 Apr 2016
Updated	05 Apr 2016
Type	Journal
Year	2016
Where	INTEGRATION
Authors	Julia Funke, Stefan Hougardy, Jan Schneider

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