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2006
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A flexible data to L2 cache mapping approach for future multicore processors

9 years 8 months ago
A flexible data to L2 cache mapping approach for future multicore processors
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cache management is a crucial multicore processor design aspect to overcome non-uniform cache access latency for high program performance and to reduce on-chip network traffic and related power consumption. Unlike previously studied “pure” hardware-based private and shared cache designs, the proposed OS-microarchitecture approach allows mimicking a wide spectrum of L2 caching policies without complex hardware support. Moreover, processors and cache slices can be isolated from each other without hardware modifications, resulting in improved chip reliability characteristics. We discuss the key design issues and implementation strategies of the proposed approach, and present an experimental result showing the promise of it. Categories and Subject Descriptors
Lei Jin, Hyunjin Lee, Sangyeun Cho
Added 13 Jun 2010
Updated 13 Jun 2010
Type Conference
Year 2006
Where ACMMSP
Authors Lei Jin, Hyunjin Lee, Sangyeun Cho
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