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2008
IEEE

Formal Verification of a Public-Domain DDR2 Controller Design

10 years 7 months ago
Formal Verification of a Public-Domain DDR2 Controller Design
This paper demonstrates a formal verificationplanning process and presents associated verification strategy that we believe is an essential (yet often neglected) step in an ASIC or SoC functional formal verification flow. Our contribution is to present a way to apply the verification planning process and a set of ion techniques on a non-trivial open-source example (the Sun OpenSPARCTM DDR2 controller). The process and verification strategy can be applied to DDR2 controllers in particular and generalized for other designs.
Abhishek Datta, Vigyan Singhal
Added 30 Nov 2009
Updated 30 Nov 2009
Type Conference
Year 2008
Where VLSID
Authors Abhishek Datta, Vigyan Singhal
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