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2007
IEEE

A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs

11 years 4 months ago
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology with the (parallelized) application mapped onto it in only a matter of hours. During this traversal, which offers a high degree of automation, guidance is provided by Daedalus’ integrated system-level design space exploration environment. We show that Daedalus offers remarkable potentials for quickly experimenting with different MP-SoC architectures and exploring system-level design options during the very early stages of design. Using a case study with a Motion-JPEG encoder application, we illustrate Daedalus’ design steps and demonstrate its efficiency. Categories and Subject Descriptors J.6 [Computer-aided Engineering]: Computer-aided design General Terms Performance, design Keywords Design space exploration, system-level design and synthesis, rapid prototyping
Mark Thompson, Hristo Nikolov, Todor Stefanov, And
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where CODES
Authors Mark Thompson, Hristo Nikolov, Todor Stefanov, Andy D. Pimentel, Cagkan Erbas, Simon Polstra, Ed F. Deprettere
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