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2005
IEEE

Hardware synthesis from guarded atomic actions with performance specifications

9 years 10 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The methodology is based on rule composition, and relies on the fact that a rule derived by the composition of two rules behaves as if the two rules were scheduled simultaneously. Rule composition is a well understood transformation in the TRS theoretical framework; however, previous rule composition approaches resulted in an explosion of the number of rules during synthesis, making them impractical for realistic designs. We avoid this problem through composition of conditional actions which generates one rule instead of 2n rules when we combine n rules. We then show how this conditional composition of rules can be compiled into an efficient hardware structure which introduces new but derived interfaces in modules. We demonstrate the approach via a small circuit example (GCD) and then show its impact on the metho...
Daniel L. Rosenband
Added 16 Mar 2010
Updated 16 Mar 2010
Type Conference
Year 2005
Where ICCAD
Authors Daniel L. Rosenband
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