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2000
IEEE

High Level Modeling for Parallel Executions of Nested Loop Algorithms

9 years 10 months ago
High Level Modeling for Parallel Executions of Nested Loop Algorithms
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (architecture), a mapping of the former into the latter, and a simulator for fast execution of the whole. Signal processing algorithms are very often nested-loop algorithms with a high degree of inherent parallelism. This paper presents - for such applications - suitable application and implemetation models, a method to convert a given imperative executable specificationto a specification in terms of the applicationmodel, a methodto map this specificationinto an architecture specificationin terms of the implementationmodel, and a method to analyze the performance through simulation. The methods and tools are illustrated by means of an example.
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, B
Added 30 Jul 2010
Updated 30 Jul 2010
Type Conference
Year 2000
Where ASAP
Authors Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, Bart Kienhuis
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