High-level scheduling model and control synthesis for a broad range of design applications

This paper presents a versatile scheduling model and an efficient control synthesis methodology which enables architectural (high-level) design/synthesis systems to seamlessly support a broad range of architectural design applications from datapathdominated digital signal processing (DSP) to micro-processors/ controllers and control-dominated peripherals, utilizing multiphase clocking schemes, multiple threading, data-dependent delays, pipelining, and combinations of the above. The work presented in this paper is an enabling technology for high-level synthesis to go beyond traditional datapath-dominated DSP applications and to start becoming a viable and cost-effective design methodology for commodity ICs such as micro-processors/ controllers and control-dominated peripherals.

• Type: Conference
• Year: 1997
• Where: ICCAD
• Authors: Chih-Tung Chen, Kayhan Küçükçakar
• Keywords: Control Synthesis Methodology, Control-dominated Peripherals, Hardware, ICCAD 1997, Micro-processors/ Controllers