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ICCAD
1997
IEEE

High-level scheduling model and control synthesis for a broad range of design applications

9 years 6 months ago
High-level scheduling model and control synthesis for a broad range of design applications
This paper presents a versatile scheduling model and an efficient control synthesis methodology which enables architectural (high-level) design/synthesis systems to seamlessly support a broad range of architectural design applications from datapathdominated digital signal processing (DSP) to micro-processors/ controllers and control-dominated peripherals, utilizing multiphase clocking schemes, multiple threading, data-dependent delays, pipelining, and combinations of the above. The work presented in this paper is an enabling technology for high-level synthesis to go beyond traditional datapath-dominated DSP applications and to start becoming a viable and cost-effective design methodology for commodity ICs such as micro-processors/ controllers and control-dominated peripherals.
Chih-Tung Chen, Kayhan Küçük&cced
Added 06 Aug 2010
Updated 06 Aug 2010
Type Conference
Year 1997
Where ICCAD
Authors Chih-Tung Chen, Kayhan Küçükçakar
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