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ASPDAC
2016
ACM

High-level synthesis of accelerators in embedded scalable platforms

3 years 6 months ago
High-level synthesis of accelerators in embedded scalable platforms
cular, it raises the level of abstraction in the design process and guides designers in the application of high-level synthesis (HLS) tools. HLS enables a more efficient design of accelerators with a focus on their algorithmic properties, a broader exploration of their design space, and a more productive reuse across many different SoC projects.
Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Ca
Added 29 Mar 2016
Updated 29 Mar 2016
Type Journal
Year 2016
Where ASPDAC
Authors Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni
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