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ISCAS
2003
IEEE

A high speed low input current low voltage CMOS current comparator

8 years 8 months ago
A high speed low input current low voltage CMOS current comparator
A new high speed low input current comparator is proposed in this paper. Based on a simple negative feedback scheme around the transimpedance stage with an emphasis on a very large loop-gain, the transformed voltage signal is maintained at the lowest swing that results in a speed improvement. On a 0.25um TSMC CMOS process, simulation results demonstrate propagation delays of 3.6ns with ±100nA input current
K. Moolpho, Jitkasem Ngarmnil, S. Sitjongsataporn
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where ISCAS
Authors K. Moolpho, Jitkasem Ngarmnil, S. Sitjongsataporn
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