Sciweavers

Share
ICS
2005
Tsinghua U.

Improved automatic testcase synthesis for performance model validation

9 years 2 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of their designs as they implement changes. The current state-ofthe-art is to use simple hand-coded bandwidth and latency testcases to assess early performance and to calibrate performance models. Applications and benchmark suites such as SPEC CPU are difficult to set up or take too long to execute on functional models. Short trace snippets from applications can be executed on performance and functional simulators, but not without difficulty on hardware, and there is no guarantee that hand-coded tests and short snippets cover the performance of the original applications. We present a new automatic testcase synthesis methodology to address these concerns. By basing testcase synthesis on the workload characteristics of an application, we create source code that largely represents the performance of the applicatio...
Robert H. Bell Jr., Lizy Kurian John
Added 27 Jun 2010
Updated 27 Jun 2010
Type Conference
Year 2005
Where ICS
Authors Robert H. Bell Jr., Lizy Kurian John
Comments (0)
books