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2006
ACM

Integrated scratchpad memory optimization and task scheduling for MPSoC architectures

10 years 5 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a complex electronic system. An MPSoC architecture is, in general, customized for an embedded application. A critical component of this customization process is the on-chip memory system configuration. Embedded systems increasingly employ software-controlled scratchpad memory (SPM) due to its inherent advantages in terms of area, energy, and timing predictability compared to caches. An applicationspecific flexible partitioning of the on-chip SPM budget among the processors is critical for performance optimization. Moreover, scheduling the tasks of an application on to the processors and partitioning the SPM are inter-dependent even though these steps are decoupled in the traditional design space exploration process. In this work, we design an integrated task mapping, scheduling, SPM partitioning, and data allocat...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr
Added 13 Jun 2010
Updated 13 Jun 2010
Type Conference
Year 2006
Where CASES
Authors Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitra
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