kT/C constrained optimization of power in pipeline ADCs

—This paper presents a method to optimize the power consumption of a pipelined ADC with kT/C noise constraint. The total power dependence on capacitor scaling and stage resolution is investigated. With eight different capacitor scaling functions, near-optimal solution can be obtained. For 12bit pipeline ADC, the power decreases with effective number of bits per stage. This method can be easily extended to other resolution pipeline ADCs.

• Type: Conference
• Year: 2005
• Where: ISCAS
• Authors: Yu Lin, Vipul Katyal, Mark Schlarmann, Randall L. Geiger
• Keywords: Capacitor Scaling, Capacitor Scaling Functions, ISCAS 2005, Pipeline Adcs