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1999
IEEE

Loop Scheduling and Partitions for Hiding Memory Latencies

12 years 1 months ago
Loop Scheduling and Partitions for Hiding Memory Latencies
Partition Scheduling with Prefetching (PSP) is a memory latency hiding technique which combines the loop pipelining technique with data prefetching. In PSP, the iteration space is first divided into regular partitions. Then two parts of the schedule, the ALU part and the memory part, are produced and balanced to produce an overall schedule with high throughput. These two parts are executed simultaneously, and hence the remote memory latency are overlapped. We study the optimal partition shape and size so that a well balanced overall schedule can be obtained. Experiments on DSP benchmarks show that the proposed methodology consistently produces optimal or near optimal solutions.
Fei Chen, Edwin Hsing-Mean Sha
Added 04 Aug 2010
Updated 04 Aug 2010
Type Conference
Year 1999
Where ISSS
Authors Fei Chen, Edwin Hsing-Mean Sha
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