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MAJC-5200: A High Performance Microprocessor for Multimedia Computing

9 years 11 months ago
MAJC-5200: A High Performance Microprocessor for Multimedia Computing
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruction level parallelism via a very long instruction word architecture VLIW and SIMD. The rst implementation, MAJC-5200, includes some key features of MAJC to realize a high performance multimedia processor. Two CPUs running at 500 MHz are integrated into the chip to provide 6.16 GFLOPS and 12.33 GOPS with high speed interfaces providing a peak input-output I O data rate of more than 4.8 G Bytes second. The chip is suitable for a number of applications including graphics multimedia processing for high-end set-top boxes, digital voice processing for telecommunications, and advanced imaging.
Subramania Sudharsanan
Added 31 Jul 2010
Updated 31 Jul 2010
Type Conference
Year 2000
Where IPPS
Authors Subramania Sudharsanan
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