New Directions in Debugging Hardware Designs

This paper introduces a new approach in the debugging of hardware designs. The design is given as a VHDL program and converted in a component connection model. The conversion is similar to the synthesis of register transfer into gate level programs. The resulting model is directly used for locating faults within the design. To do this, we propose the application of model-based diagnosis. The advantage of this approach is its degree of automation and that it can be applied even on today's mid-size to large size programs.

• Type: Conference
• Year: 1999
• Where: IEAAIE
• Authors: Franz Wotawa
• Keywords: Artificial Intelligence, Component Connection Model, Gate Level Programs, IEAAIE 1999, Large Size Programs