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2006
ACM

A new LP based incremental timing driven placement for high performance designs

10 years 1 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advantage of the path-based delay sensitivity with limited-stage slew propagation, thus it enjoys certain hybrid feature of net and path-based timing driven placement. Our LP formulation considers not only cells on the critical paths, but also cells that are logically adjacent to the critical paths (i.e., the criticality ad jacency network) in a unified manner. We further present a timing aware spreading method to preserve timing in legalization for high performance designs. Our algorithm has been tested on a set of 65nm industry circuits from a multi-GHz microprocessor, and shown to achieve much improved timing on hand-tuned circuits. Categories and Subject Descriptors B.7.2 [Hardware, Integrated Circuit, Design Aids]: Placement and Routing General Terms Algorithms, Design
Tao Luo, David Newmark, David Z. Pan
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 2006
Where DAC
Authors Tao Luo, David Newmark, David Z. Pan
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