Sciweavers

Share
VLDB
2005
ACM

Optimistic Intra-Transaction Parallelism on Chip Multiprocessors

11 years 5 months ago
Optimistic Intra-Transaction Parallelism on Chip Multiprocessors
With the advent of chip multiprocessors, exploiting intra-transaction parallelism is an attractive way of improving transaction performance. However, exploiting intra-transaction parallelism in existing database systems is difficult, for two reasons: first, significant changes are required to avoid races or conflicts within the DBMS, and second, adding threads to transactions requires a high level of sophistication from transaction programmers. In this paper we show how dividing a transaction into speculative threads solves both problems—it minimizes the changes required to the DBMS, and the details of parallelization are hidden from the transaction programmer. Our technique requires a limited number of small, localized changes to a subset of the low-level data structures in the DBMS. Through this method of parallelizing transactions we can dramatically improve performance: on a simulated 4-processor chipmultiprocessor, we improve the response time by 36–74% for three of the ...
Christopher B. Colohan, Anastassia Ailamaki, J. Gr
Added 28 Jun 2010
Updated 28 Jun 2010
Type Conference
Year 2005
Where VLDB
Authors Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
Comments (0)
books