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SIGPLAN
2008

A parallel dynamic compiler for CIL bytecode

8 years 11 months ago
A parallel dynamic compiler for CIL bytecode
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the potentialities of their hardware parallelism. At the same time, object code virtualization technologies are achieving a growing popularity, as they allow higher levels of software portability and reuse. Thus, a virtual execution environment running on a multi-core processor has to run complex, high-level applications and to exploit as much as possible the underlying parallel hardware. We propose an approach that leverages on CMP features to expose a novel pipeline synchronization model for the internal threads of the dynamic compiler. Thanks to compilation latency masking effect of the pipeline organization, our dynamic compiler, ILDJIT, is able to achieve significant speedups (26% on average) with respect to the baseline, when the underlying hardware exposes at least two cores.
Simone Campanoni, Giovanni Agosta, Stefano Crespi-
Added 15 Dec 2010
Updated 15 Dec 2010
Type Journal
Year 2008
Where SIGPLAN
Authors Simone Campanoni, Giovanni Agosta, Stefano Crespi-Reghizzi
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