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2008
IEEE

Performance debugging of Esterel specifications

9 years 1 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based on the underlying "synchrony hypothesis", where the computation/communication associated with the processing of all events occurring within the same "clock tick" are assumed to happen instantaneously (or in zero time). In reality, Esterel specifications get compiled to implementations (such as C code) which do not satisfy the perfect synchrony assumption. Hence, platform-specific timing analysis of such implementations is an important research topic. Interest in this area has lately been renewed with the recent advances in Worst-case Execution Time (WCET) analysis techniques. In this paper we perform WCET analysis on sequential C code and exploit the structure of the code generated from Esterel specifications to obtain tight WCET estimates. Such estimates can validate Esterel-level assump...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar
Added 18 Oct 2010
Updated 18 Oct 2010
Type Conference
Year 2008
Where CODES
Authors Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samarjit Chakraborty
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