Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

12

ARITH
1997
IEEE

favoriteEmaildiscussreport

97views Applied Computing» more ARITH 1997»

Pipelined Packet-Forwarding Floating Point: II. An Adder

13 years 8 months ago

Pipelined Packet-Forwarding Floating Point: II. An Adder

Download www.acsel-lab.com

Asger Munk Nielsen, David W. Matula, Chung Nan Lyu

Real-time Traffic

Applied Computing | ARITH 1997 |

claim paper

Related Content

» Pipelined PacketForwarding Floating Point I Foundations and a Rounder

» Optimistic Parallelization of FloatingPoint Accumulation

» Computing LennardJones Potentials and Forces with Reconfigurable Hardware

» Designing Scalable FPGABased Reduction Circuits Using Pipelined FloatingPoint Cores

» An FPGABased FloatingPoint Jacobi Iterative Solver

» Sparse MatrixVector Multiplication Design on FPGAs

» RealTime Modeling of WheelRail Contact Laws with SystemOnChip

Post Info
More Details (n/a)

Added	05 Aug 2010
Updated	05 Aug 2010
Type	Conference
Year	1997
Where	ARITH
Authors	Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even

Comments (0)