Quantifying Load Stream Behavior

The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two major architectural features used to address this growing gap are caches and prefetching. In this paper we perform a detailed quantification of the cache miss patterns for the Olden benchmarks, SPEC 2000 benchmarks, and a collection of pointer based applications. We classify misses into one of four categories corresponding to the type of access pattern. These are next-line, stride, same-object (additional misses that occur to a recently accessed object), or pointer-based transitions. We then propose and evaluate a hardware profiling architecture to correctly identify which type of access pattern is being seen. This access pattern identification could be used to help guide and allocate prefetching resources, and provide information to feedback-directed optimizations. A second goal of this paper is to identify a ...

• Type: Conference
• Year: 2002
• Where: HPCA
• Authors: Suleyman Sair, Timothy Sherwood, Brad Calder
• Keywords: Access Pattern, Access Pattern Identification, Computer Architecture, HPCA 2002, Olden Benchmarks