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CVPR
1998
IEEE

Real-Time 2-D Feature Detection on a Reconfigurable Computer

9 years 11 months ago
Real-Time 2-D Feature Detection on a Reconfigurable Computer
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this device as the front-end of a system able to track image features in real-time control applications like autonomous vehicle navigation. The algorithm employed to select good features is inspired by Tomasi and Kanade's method. Compared to the original method, the algorithm that we have devised does not require any jloating point or transcendental operations, and can be implemented either in hardware or in software. Moreover, it maps eficiently into a highly pipelined architecture, well suited to implementation in FPGA technology. We have implemented the algorithm on a low-cost reconfigurable computer and have observed reliable operation on an image stream generated by a standard NTSC video camera at 30 Hz.
Arrigo Benedetti, Pietro Perona
Added 12 Oct 2009
Updated 12 Oct 2009
Type Conference
Year 1998
Where CVPR
Authors Arrigo Benedetti, Pietro Perona
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