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ISCAS
2007
IEEE

Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation

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Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation
Abstract— Approximation of Toeplitz matrices with circulant matrices is a well-known approach to reduce the computational complexity of linear equalizers. This paper presents a novel technique to compute linear equalizer coefficients in the frequency domain. It is shown how a regularization term can help to reduce the error caused by the frequency domain approximation. A corresponding VLSI implementation provides reference for the true silicon complexity and for the complexity increase associated with the proposed algorithm.
Andreas Burg, Simon Haene, Wolfgang Fichtner, Mark
Added 04 Jun 2010
Updated 04 Jun 2010
Type Conference
Year 2007
Where ISCAS
Authors Andreas Burg, Simon Haene, Wolfgang Fichtner, Markus Rupp
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