Sciweavers

Share
ISMVL
2010
IEEE

Secure Design Flow for Asynchronous Multi-valued Logic Circuits

9 years 8 months ago
Secure Design Flow for Asynchronous Multi-valued Logic Circuits
—The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques often implies non-standard methods that are not supported by the conventional design tools. In the recent decade the designers of secure devices have been working hard on customising the workflow. The presented research aims to collect the up-to-date experiences in this area and create a generic approach to the secure design flow that can be used as guidance by engineers. In the presented paper the emphasis is put on multi-valued logic synthesis and asynchronous system design. The proposed flow employs the tool based on higher radix and mixed radix Reed-Muller expansions [1], power-balanced logic component libraries and TiDE design environment [2]. The challenge of the research here is interfacing between different EDA tools and technologies. An example is also presented and described from the view of the ...
Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
Added 10 Jul 2010
Updated 10 Jul 2010
Type Conference
Year 2010
Where ISMVL
Authors Ashur Rafiev, Julian P. Murphy, Alexandre Yakovlev
Comments (0)
books