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DAC
2005
ACM

Asynchronous circuits transient faults sensitivity evaluation

9 years 6 days ago
Asynchronous circuits transient faults sensitivity evaluation
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circuits have a very different behavior than synchronous circuits in the presence of faults. We address the effects of transient faults in QDI circuits and describe the causes that lead the faults to be memorized into one or more soft errors. Therefore, a refined fault sensitivity criterion is defined for this class of circuits. This methodology enables us to point out the weak parts of a circuit. An analysis tool is implemented to support this evaluation. This tool provides a quantitative study of the fault sensitivity, and enables us to compare the robustness of different architectures of a circuit along the steps of its design flow. The objective of this work is to evaluate the circuits robustness against natural faults (single fault model) and intentional fault injection (multiple faults model). Categories and ...
Yannick Monnet, Marc Renaudin, Régis Leveug
Added 13 Oct 2010
Updated 13 Oct 2010
Type Conference
Year 2005
Where DAC
Authors Yannick Monnet, Marc Renaudin, Régis Leveugle
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