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HPCA
2004
IEEE

Signature Buffer: Bridging Performance Gap between Registers and Caches

12 years 8 months ago
Signature Buffer: Bridging Performance Gap between Registers and Caches
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new storage media with a novel addressing mechanism to avoid address calculations. Instead of a memory address, each load and store is assigned a signature for accessing the new storage. A signature consists of the color of the base register along with its displacement value. A unique color is assigned to a register whenever the register is updated. When two memory instructions have the same signature, they address to the same memory location. This memory signature can be formed early in the processor pipeline. A small Signature Buffer, addressed by the memory signature, can be established to permit stores and loads bypassing normal memory hierarchy for fast data communication. Performance evaluations based on an Alpha 21264-like pipeline using SPEC2000 integer benchmarks show that an IPC (Instruction-Per-Cycle)...
Lu Peng, Jih-Kwon Peir, Konrad Lai
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2004
Where HPCA
Authors Lu Peng, Jih-Kwon Peir, Konrad Lai
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