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FPGA
2009
ACM

SPR: an architecture-adaptive CGRA mapping tool

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SPR: an architecture-adaptive CGRA mapping tool
In this paper we present SPR, a new architecture-adaptive mapping tool for use with Coarse-Grained Reconfigurable Architectures (CGRAs). It combines a VLIW style scheduler and FPGA style placement and pipelined routing algorithms with novel mechanisms for integrating and adapting the algorithms to CGRAs. We introduce a latency padding technique that provides feedback from the placer to the scheduler to meet the constraints of a fixed frequency device with configurable interconnect. Using a new dynamic
Stephen Friedman, Allan Carroll, Brian Van Essen,
Added 19 May 2010
Updated 19 May 2010
Type Conference
Year 2009
Where FPGA
Authors Stephen Friedman, Allan Carroll, Brian Van Essen, Benjamin Ylvisaker, Carl Ebeling, Scott Hauck
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