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2007
Springer

Systematic Customization of On-Chip Crossbar Interconnects

10 years 3 months ago
Systematic Customization of On-Chip Crossbar Interconnects
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identical physical topologies to logical topologies for given applications. The network has been implemented with parameterized switches, dynamically multiplexed by a traffic controller. Considering practical media applications, a multiprocessor system combined with the presented network has been integrated and prototyped in Virtex-II Pro FPGA using the ESPAM design environment. The experiment shows that the network realizes on-demand traffic patterns, occupies on average 59% less area, and maintains performance comparable with a conventional crossbar.
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama
Added 07 Jun 2010
Updated 07 Jun 2010
Type Conference
Year 2007
Where ARC
Authors Jae Young Hur, Todor Stefanov, Stephan Wong, Stamatis Vassiliadis
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