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DATE
2003
IEEE

A Technique for High Ratio LZW Compression

10 years 6 months ago
A Technique for High Ratio LZW Compression
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan test patterns using the LZW algorithm is presented. This method leverages the large number of “Don't-Cares” in test vectors in order to improve the compression ratio significantly. The hardware decompression architecture presented here uses existing on-chip embedded memories. Tests using the ISCAS89 and the ITC99 benchmarks show that this method achieves high compression ratios.
Michael J. Knieser, Francis G. Wolff, Christos A.
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where DATE
Authors Michael J. Knieser, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, David R. McIntyre
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