Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

13

ASYNC
1997
IEEE

favoriteEmaildiscussreport

67views Hardware» more ASYNC 1997»

Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis

13 years 9 months ago

Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis

Download www.lsi.upc.es

Alex Kondratyev, Michael Kishinevsky, Jordi Cortad

Real-time Traffic

ASYNC 1997 | Hardware |

claim paper

Related Content

» A new enhanced constructive decomposition and mapping algorithm

» Delay Minimal Decomposition of Multiplexers in Technology Mapping

» Logic decomposition during technology mapping

» FPGA technology mapping a study of optimality

» Decomposition and technology mapping of speedindependent circuits using Boolean relations

» Simultaneous logic decomposition with technology mapping in FPGA designs

» A Boolean Approach to PerformanceDirected Technology Mapping for LUTBased FPGA Designs

» Poweraware FPGA logic synthesis using binary decision diagrams

» Layout Driven Logic RestructuringDecomposition

Post Info
More Details (n/a)

Added	05 Aug 2010
Updated	05 Aug 2010
Type	Conference
Year	1997
Where	ASYNC
Authors	Alex Kondratyev, Michael Kishinevsky, Jordi Cortadella, Luciano Lavagno, Alexandre Yakovlev

Comments (0)